TOP > Report & Column > The Forefront of Space Science > 2012 > When a Computer is Surprised
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SET Noise This problem entered the new phase in the 21st century. To explain the problem, we need a more detailed explanation on the interior of a computer chip as shown at the top of Fig. 2. A chip is composed of a "computation element" to perform computation and a "memory element" to store the computation result. Computation is executed in digital and, usually, high-voltage is allocated to 1 while low-voltage allocated to 0. We use this allocation in the following discussion. Originally, computation elements were relatively robust to cosmic rays. However, as a result of making the elements smaller to upgrade their performance (i.e., speed-up of computation), they become vulnerable to the rays. When the computation elements are struck by cosmic rays, they are shocked to output a wrong result as shown at the bottom of Fig. 2. The phenomenon whereby elements are shocked into abnormal operation is called "Single Event Transient (SET) noise occurrence." To avoid the problem, an understanding of the noise is key. 
As shown in Fig. 1, we know the aspect of a shock event (i.e., signal form) of a single transistor switch. What then is the difference between the shock events of a single transistor and a computation element? This question poses one particular difficulty. A computation element comprises many transistor switches. If a single transistor is shocked by cosmic rays, the neighboring switches are also shocked. Thus, the event continues in a chain reaction. Finally, a shock signal (SET noise) appears in the computation element. Since the features of multiple transistor switches are combined, the resulting event differs from an event occurring in a single transistor switch. In this case, what is the SET noise of a computation element like? Elucidation of SET Noise I joined ISAS in 2005 and was determined to tackle the SET noise issue. I attempted to forecast a form of SET noise based on data in Fig. 1. According to my notes, I successfully completed a method to forecast the form in January 2006. How to observe the shocked aspect of the transistor switches was key to the forecast. I slightly improved the mechanism to apply electric current. Normally, a single voltage was used for the experiment. For example, the signal in Fig. 1 is fixed at 1.8V. By changing the voltage little by little, I was able to record the individual profiles of the shocks. In fact, since the voltage of the switches embedded into the elements varied constantly, a variation effect had to be incorporated. I was able to map the form of the SET noise by recording the changing profile and features of other switches, and tracing the intersection points on graph paper. In this way, the noise estimation became possible. Next, I wanted to see the actual SET noise form using the easiest approach possible. Many researchers use the "self-triggering flip-flop chain" method to study SET noise. It is convenient, but forces us to design a precise combination of over 1,000 switches. As an impatient person, this was too laborious for me. Moreover, I didn't think it was a good idea, because the duration of the shock can only be measured after preparing the numerous switches.
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